Platinum7 Electronics

TRS-80 Model 1 Clone Blog #1

The Inspiration

I really wanted to build my own TRS-80 Model 1 for a long time...  I bought my first TRS-80 in 1979 when I was working at Tandy Electronics (the Australian version of Radio Shack) as a young teenager - it cost over A$1,169 and had just 16K RAM and a cassette player for data storage.  I still have it and it has been upgraded to lower case (!), and now has the Expansion Interface to get to a massive 48K RAM, as well as the ability to have up to four 5.25" floppy drives.  Better still, it is working fine today after all this time.  However I still wanted to build my own and I had an issue - how do I get video out?  I didn't really want to use composite video as that is getting harder and harder to show on monitors and it is rubbish quality (usually).  So I needed VGA - but how?  I spent a long time researching different tools that could do VGA output from a microcontroller and thought that I may be able to integrate it somehow.  These seemed way too hard and would not really fit the bill.  I decided I had to build it using an FPGA, however these used Verilog or VHDL and that seemed a bit too complicated as well and they would be huge overkill, all the ones I found ran on 3.3V which made interfacing a bit more tricky with the 5V Z80 and the vast majority were surface mount which makes it harder to build.  I was at an impasse.

Then along comes Bernardo Kastrup from The Byte Attic who designed and built the Cerberus 2080 single board computer which used a Z80 (and a 6502) and had VGA output using a CPLD and used a simple "programming language" (CUPL) which is easy to understand for logic level designers.  Bernardo explained in the YouTube videos of the build, how the logic was going to work and he presents it in a very easy to understand way and explained all the ins and outs which made it very easy for me to decide to use the Atmel (Microchip) ATF1508AS CPLD device.

So this was it!  I had a solution to my VGA conundrum.  Now all I needed to do was design and build some test bed circuit boards as I did not want to spend a lot of money on the ATF15XX-DK3-U development board.  I needed to buy the programmer (ATDH1150USB) as the programmer I have that will do my Flash, EPROM, etc is not compatible with the ATF1508AS CPLD.

Here are the 3D renders of the test bed boards I designed for the initial design & test process using DipTrace.  Actually these are later revisions as I originally used a programmable clock generator (DS1086Z+) for both the VGA and the Z80 clocks.  However I found that the frequencies generated were not that stable, so I went to Crystal Oscillators (CXOs) instead.  The 84pin PLCC board has a space on the right for either 8 or 14 pin DIP compatible CXOs or a surface mount one.  I do not intend to use the surface mount CXO in the final version, however it is a good test rig.  The boards were made by JLCPCB in China.  The long grey blobs in the renders are pull-up or pull-down resistor packs.  Common on pin 1 and then 10k resistors from the common to the other pins.

They're in a carousel, so please click the arrows to move or click the image for a full screen display.

84pin PLCC CPLD test bed with CXO and buffer
84pin PLCC CPLD test bed with CXO and buffer

This will take either an ATF1508AS or an ATF1504AS CPLD device and the I/O Pins can be set to either 3.3V or 5V logic compatibility. It has a JTAG programming socket for the CPLD.

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44pin PLCC CPLD test bed with 16bit wide Character ROM and dual ported Video RAM
44pin PLCC CPLD test bed with 16bit wide Character ROM and dual ported Video RAM

This will take either an ATF1504AS or an ATF1502AS CPLD device. There is also a VGA socket and a JTAG socket for programming the CPLD.

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Z80 CPU, Buffers, PAL and ROM test bed board
Z80 CPU, Buffers, PAL and ROM test bed board

This holds the Z80 with the bidirectional, tristate data buffer as well as the tristate address buffer. There is a PAL chip to see if this is able to do the address decoding for the design, otherwise I will use a ATF1502 which has more I/O pins. The Flash memory chip in the bottom right is for the BASIC ROM and will also be used as a test bed to simulate Video RAM without a CPU.

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84pin PLCC CPLD test bed with CXO and buffer
84pin PLCC CPLD test bed with CXO and buffer

This will take either an ATF1508AS or an ATF1504AS CPLD device and the I/O Pins can be set to either 3.3V or 5V logic compatibility. It has a JTAG programming socket for the CPLD.

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1/3
CPLD Test Rig

This is my test rig with the programmable frequency generator standing in for the CXOs.  This was done as I could get a clock down to 400KHz to allow me to see what was going on a bit easier and the 400KHZ is 100x slower than the real 40MHz clock for the 800x600 VGA circuit.  I originally put some surface mount LEDs on board to allow for BlinkenLights, however you can't see much at 400KHz!  I will be explaining my design choices for the character size and VGA resolutions as well as going through the "programming" I did in the CPLD to get the right pulses at the right moments to generate a VGA picture in the next episodes...

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