TRS-80 Model 1 Clone Blog #4
CPLD Programming Part 1 - CUPL
Now into the fun part. I will go through a bit about the CUPL language and interesting bits I have learnt as well as some pitfalls I encountered (along with the solutions)...
Following Bernardo's videos gave me the insight I needed to be able to do my own CUPL programming for my VGA output. And I learnt some interesting things along the way which I will highlight so you can use them as well.
Firstly, CUPL is not a procedural language - it is a logic description which happens in parallel, usually controlled by a clock signal coming into the CPLD. You can have variables in CUPL, however they are just bits and I use them as flags for the other parts of the system. And since creating VGA signals relies on things happening at certain times, counters are required. You can also do simple things like replacing lots of discrete chips used for memory addressing or other uses without the need for a clock. I will be using a PAL or a small CPLD for my memory addressing requirements later in the build. At the moment, I am just focusing on getting the VGA output working.
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